Vivado的使用流程，有没有推荐？
二牛学FPGA
提问者
File<\/code><\/span> \u83dc\u5355\u680f\u79cd\u9009\u62e9 Add Sources...<\/code><\/span> \uff1a"},"attrs":[]},"54":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c8\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/8.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c8\u5f20"},"attrs":{"id":10148,"sizeSlug":"full","linkDestination":"none"}},"56":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"58":{"name":"paragraph","html":{"component":"p","class":"","content":"\u8fdb\u5165\u6dfb\u52a0\u6e90\u6587\u4ef6\u5bf9\u8bdd\u6846\uff1a"},"attrs":[]},"60":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c9\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/9.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c9\u5f20"},"attrs":{"id":10149,"sizeSlug":"full","linkDestination":"none"}},"62":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"64":{"name":"paragraph","html":{"component":"p","class":"","content":"\u521b\u5efa\u65b0\u7684\u6587\u4ef6\uff1a"},"attrs":[]},"66":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c10\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/10.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c10\u5f20"},"attrs":{"id":10150,"sizeSlug":"full","linkDestination":"none"}},"68":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"70":{"name":"paragraph","html":{"component":"p","class":"","content":"\u8f93\u5165 decoder \u4e3a\u521b\u5efa\u6587\u4ef6\u7684\u540d\u79f0\uff0c\u6ce8\u610f\u6587\u4ef6\u7c7b\u578b\u9009\u62e9\u4e3a SystemVerilog\uff1a"},"attrs":[]},"72":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c11\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/11.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c11\u5f20"},"attrs":{"id":10151,"sizeSlug":"full","linkDestination":"none"}},"74":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"76":{"name":"paragraph","html":{"component":"p","class":"","content":"\u521b\u5efa\u5b8c\u6587\u4ef6\uff0c\u70b9\u51fb finish\uff1a"},"attrs":[]},"78":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c12\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/12.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c12\u5f20"},"attrs":{"id":10152,"sizeSlug":"full","linkDestination":"none"}},"80":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"82":{"name":"paragraph","html":{"component":"p","class":"","content":"\u8bbe\u7f6e\u8f93\u5165\u8f93\u51fa\uff1a"},"attrs":[]},"84":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c13\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/13.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c13\u5f20"},"attrs":{"id":10153,"sizeSlug":"full","linkDestination":"none"}},"86":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"88":{"name":"paragraph","html":{"component":"p","class":"","content":"\u6dfb\u52a0\u5b8c\u6210\uff0c\u5e76\u4e14\u53ef\u4ee5\u67e5\u770b\u6e90\u4ee3\u7801\uff1a"},"attrs":[]},"90":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c14\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/14.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c14\u5f20"},"attrs":{"id":10154,"sizeSlug":"full","linkDestination":"none"}},"92":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"94":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5728\u6e90\u4ee3\u7801\u90e8\u5206\u8f93\u5165\u4ee5\u4e0b\u6e90\u4ee3\u7801\uff1a"},"attrs":[]},"96":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"98":{"name":"code","html":"module decoder (\n input wire [3:0] sw, \/\/\u62e8\u52a8\u5f00\u5173\u8f93\u5165\n output reg [6:0] seg \/\/\u4e03\u6bb5\u6570\u7801\u7ba1\u8f93\u51fa\n );\n\n always_comb begin\n case (sw)\n 4'd0: seg = 7'b1111110;\n \/\/ ... \u8865\u5168\u5176\u4ed6\u60c5\u51b5 (4'd1~4'd9)\n default: seg = 7'b0; \/\/ \u9ed8\u8ba4 4'dA~4'dF \u90fd\u663e\u793a\u4e3a\u5168\u706d\n endcase\n end\nendmodule","attrs":[]},"100":{"name":"paragraph","html":{"component":"p","class":"","content":"\u8f93\u5165\u4ee3\u7801\u4e4b\u540e\u7684\u60c5\u51b5\uff1a"},"attrs":[]},"102":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c15\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/15.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c15\u5f20"},"attrs":{"id":10155,"sizeSlug":"full","linkDestination":"none"}},"104":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"106":{"name":"paragraph","html":{"component":"p","class":"","content":"\u4e0a\u8ff0\u7684\u4ee3\u7801\u5c31\u662f\u4e00\u4e2a\u4e03\u6bb5\u6570\u7801\u7ba1\u7684\u8bd1\u7801\u5668\uff0c\u53ea\u8bd1\u7801\u4e86\u8f93\u5165\u4e3a 0 \u7684\u60c5\u51b5\uff0c\u5176\u4ed6\u4ee3\u7801\u8fd8\u9700\u8981\u8865\u5145\u3002"},"attrs":[]},"108":{"name":"heading","html":{"level":"h3","class":"wp-block-heading","id":"","title":"\u4ee3\u7801\u7efc\u5408"},"attrs":{"level":3}},"110":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5199\u5b8c\u4ee3\u7801\u4e4b\u540e\uff0c\u5c06\u7ecf\u8fc7\u7efc\u5408\uff0c\u5b9e\u73b0\uff0c\u751f\u6210\u6bd4\u7279\u6d41\u7684\u8fc7\u7a0b\uff0c\u6700\u7ec8\u751f\u6210\u53ef\u4ee5\u52a0\u8f7d\u5230 FPGA \u4e0a\u9762\u80fd\u7528\u7684\u6bd4\u7279\u6d41\u6587\u4ef6\u3002\u4e0b\u9762\u662f\u5404\u4e2a\u6d41\u7a0b\u7684\u542b\u4e49\u3002"},"attrs":[]},"112":{"name":"paragraph","html":{"component":"p","class":"","content":"\u7efc\u5408 (synthesis)\uff1aVerilog \u8bed\u8a00\u7ffb\u8bd1\u4e3a\u95e8\u7535\u8def\u7684\u8868\u793a\uff0c\u4f7f\u7528 LUT\uff0cFF\uff08flip-flop\uff0c\u5bc4\u5b58\u5668\uff09\u65b9\u5f0f\u6765\u5b8c\u6210\u95e8\u7535\u8def\u7684\u6784\u6210\u7b49\u3002"},"attrs":[]},"114":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5b9e\u73b0 (implementation)\uff1a\u8003\u8651\u8fde\u7ebf\uff0c\u5404\u4e2a\u5143\u5668\u4ef6\u7684\u653e\u7f6e\uff0c\u8fde\u7ebf\u4f18\u5316\u7b49\u3002"},"attrs":[]},"116":{"name":"paragraph","html":{"component":"p","class":"","content":"\u751f\u6210 bitstream\uff1a\u751f\u6210\u6700\u7ec8\u7684\u53ef\u4ee5\u4f7f\u7528\u7684\u6bd4\u7279\u6d41\u6587\u4ef6\uff0c\u53ef\u4ee5\u88ab\u52a0\u8f7d\u5230 FPGA \u4e0a\u4f7f\u7528\u3002"},"attrs":[]},"118":{"name":"paragraph","html":{"component":"p","class":"","content":"\u4e0b\u9762\u662f\u4ee3\u7801\u7ecf\u8fc7\u7efc\u5408\u548c\u5b9e\u73b0\u548c\u751f\u6210\u6bd4\u7279\u6d41\u7684\u5404\u4e2a\u8fc7\u7a0b\u3002\u5b9e\u9645\u5de5\u4f5c\u4e2d\uff0c\u53ef\u4ee5\u76f4\u63a5\u70b9\u51fb Generate Bitstream<\/code><\/span> \u9009\u9879\u6765\u76f4\u63a5\u751f\u6210\u6bd4\u7279\u6d41\u3002Vivado \u8f6f\u4ef6\u4f1a\u81ea\u52a8\u8c03\u7528\u4e0a\u9762\u7684\u4e09\u4e2a\u8fc7\u7a0b\u3002"},"attrs":[]},"120":{"name":"paragraph","html":{"component":"p","class":"","content":"\u9009\u62e9\u7efc\u5408\u9009\u9879\uff1a"},"attrs":[]},"122":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c16\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/16.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c16\u5f20"},"attrs":{"id":10156,"sizeSlug":"full","linkDestination":"none"}},"124":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"126":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5f00\u59cb\u7efc\u5408\uff1a"},"attrs":[]},"128":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c17\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/17.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c17\u5f20"},"attrs":{"id":10157,"sizeSlug":"full","linkDestination":"none"}},"130":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"132":{"name":"paragraph","html":{"component":"p","class":"","content":"\u7efc\u5408\u8fdb\u884c\u4e2d\uff1a"},"attrs":[]},"134":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c18\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/18.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c18\u5f20"},"attrs":{"id":10158,"sizeSlug":"full","linkDestination":"none"}},"136":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"138":{"name":"paragraph","html":{"component":"p","class":"","content":"\u7efc\u5408\u5b8c\u6210\uff1a"},"attrs":[]},"140":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c19\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/19.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c19\u5f20"},"attrs":{"id":10159,"sizeSlug":"full","linkDestination":"none"}},"142":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"144":{"name":"paragraph","html":{"component":"p","class":"","content":"\u70b9\u51fb ok \u7ee7\u7eed\u5b8c\u6210\u5b9e\u73b0\uff1a"},"attrs":[]},"146":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c20\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/20.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c20\u5f20"},"attrs":{"id":10160,"sizeSlug":"full","linkDestination":"none"}},"148":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"150":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5b9e\u73b0\u5b8c\u6210\uff1a"},"attrs":[]},"152":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c21\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/21.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c21\u5f20"},"attrs":{"id":10161,"sizeSlug":"full","linkDestination":"none"}},"154":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"156":{"name":"paragraph","html":{"component":"p","class":"","content":"Open Implemented Design<\/code><\/span> \u6253\u5f00\u5b9e\u73b0\u8bbe\u8ba1\uff0c\u7528\u4e8e\u8fdb\u884c\u6dfb\u52a0\u7ea6\u675f\u7b49\u64cd\u4f5c\u3002"},"attrs":[]},"158":{"name":"paragraph","html":{"component":"p","class":"","content":"Generate Bitstream<\/code><\/span> \u751f\u6210\u7528\u4e8e\u4e0b\u8f7d\u5230 FPGA \u7684\u6bd4\u7279\u6d41\u6587\u4ef6\uff0c\u6ca1\u6709\u6dfb\u52a0\u7ea6\u675f\u7684\u60c5\u51b5\u4e0b\u76f4\u63a5\u751f\u6210\u6bd4\u7279\u6d41\u6587\u4ef6\u53ef\u80fd\u4f1a\u62a5\u9519\uff0c\u56e0\u6b64\u9700\u8981\u5148\u6dfb\u52a0\u7ea6\u675f\u3002"},"attrs":[]},"160":{"name":"paragraph","html":{"component":"p","class":"","content":"View Report<\/code><\/span> \u67e5\u770b\u7efc\u5408\u62a5\u544a\u3002"},"attrs":[]},"162":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"164":{"name":"paragraph","html":{"component":"p","class":"","content":"Note"},"attrs":[]},"166":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5982\u679c\u76f4\u63a5\u9009\u62e9Generate Bitstream<\/code><\/span> \uff0c\u5728\u751f\u6210\u6bd4\u7279\u6d41\u7684\u65f6\u5019\uff0cVivado \u4f1a\u62a5\u544a\u7c7b\u4f3c\u4e0b\u9762\u7684\u9519\u8bef\uff1a"},"attrs":[]},"168":{"name":"paragraph","html":{"component":"p","class":"","content":" "},"attrs":[]},"170":{"name":"code","html":"[DRC UCIO-1] Unconstrained Logical Port: 11 out of 11 logical ports have no user assigned specific location constraint (LOC). \n...Problem ports: seg[6:0], and sw[3:0].","attrs":[]},"172":{"name":"paragraph","html":{"component":"p","class":"","content":"\u8fd9\u662f\u56e0\u4e3a\u76ee\u524d\u9879\u76ee\u4e2d\u7f3a\u5c11\u7ea6\u675f\u6587\u4ef6\uff0c\u4e0b\u9762\u4ecb\u7ecd\u5982\u4f55\u6dfb\u52a0\u7ea6\u675f\uff0c\u90a3\u65f6\u5c31\u53ef\u4ee5\u6210\u529f\u5730\u751f\u6210\u6bd4\u7279\u6d41\u6587\u4ef6\u3002"},"attrs":[]},"174":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c22\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/22.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c22\u5f20"},"attrs":{"id":10162,"sizeSlug":"full","linkDestination":"none"}},"176":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"178":{"name":"heading","html":{"level":"h3","class":"wp-block-heading","id":"","title":"\u6dfb\u52a0\u7ea6\u675f"},"attrs":{"level":3}},"180":{"name":"paragraph","html":{"component":"p","class":"","content":"\u7ea6\u675f\u662f\u6307\u5b9a Vivado \u8f6f\u4ef6\u4e00\u4e9b\u884c\u4e3a\u7684 Tcl \u8bed\u8a00\u8bed\u53e5\uff0c\u5728\u672c\u5b9e\u9a8c\u7684\u8303\u56f4\u5185\uff0c\u4e3b\u8981\u7528\u5230\u7684\u5c31\u662f IO \u7ea6\u675f\uff0c\u5373\u5c06\u5df2\u7ecf\u5b8c\u6210\u7684\u9876\u5c42\u6a21\u5757\u4e2d\u7684\u4fe1\u53f7\uff0c\u4e0e FPGA \u82af\u7247\u5b9e\u9645\u7684\u8f93\u5165\u8f93\u51fa\u7ba1\u811a\u5bf9\u5e94\u8d77\u6765\uff0c\u8fd9\u6837\u751f\u6210\u7684\u6700\u540e\u7684\u6bd4\u7279\u6d41\u6587\u4ef6\u624d\u80fd\u591f\u5728\u677f\u5b50\u4e0a\u771f\u6b63\u6267\u884c\u3002"},"attrs":[]},"182":{"name":"paragraph","html":{"component":"p","class":"","content":"\u901a\u8fc7Open Implemented Design<\/code><\/span> \u4e2d\u7684 Constraint Wizard<\/code><\/span> \u6765\u5b9a\u4e49\u7ea6\u675f\uff0c\u70b9\u51fb Define Target<\/code><\/span> \u6309\u94ae\uff1a"},"attrs":[]},"184":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c23\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/23.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c23\u5f20"},"attrs":{"id":10163,"sizeSlug":"full","linkDestination":"none"}},"186":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"188":{"name":"paragraph","html":{"component":"p","class":"","content":"\u521b\u5efa\u7ea6\u675f\u6587\u4ef6\uff1a"},"attrs":[]},"190":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c24\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/24.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c24\u5f20"},"attrs":{"id":10164,"sizeSlug":"full","linkDestination":"none"}},"192":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"194":{"name":"paragraph","html":{"component":"p","class":"","content":"\u9009\u62e9 Create File \u65b0\u5efa\u6587\u4ef6\uff1a"},"attrs":[]},"196":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c25\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/25.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c25\u5f20"},"attrs":{"id":10165,"sizeSlug":"full","linkDestination":"none"}},"198":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"200":{"name":"paragraph","html":{"component":"p","class":"","content":"\u9009\u62e9\u65b0\u6587\u4ef6\u4e3a\u8bbe\u8ba1\u7684\u7ea6\u675f\u6587\u4ef6\uff1a"},"attrs":[]},"202":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c26\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/26.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c26\u5f20"},"attrs":{"id":10166,"sizeSlug":"full","linkDestination":"none"}},"204":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"206":{"name":"paragraph","html":{"component":"p","class":"","content":"\u7f16\u8f91 clock.xdc \u6587\u4ef6\uff1a"},"attrs":[]},"208":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c27\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/27.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c27\u5f20"},"attrs":{"id":10167,"sizeSlug":"full","linkDestination":"none"}},"210":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"212":{"name":"paragraph","html":{"component":"p","class":"","content":"\u4f7f\u7528\u53ef\u7f16\u7a0b\u6a21\u5757\u4e0a\u7684\u63a5\u63d2\u5b54\u8fde\u63a5\u5f00\u5173\u548c\u4e03\u6bb5\u6570\u7801\u7ba1\uff0c\u5176\u4e2d IO1 ~ IO4 \u4f5c\u4e3a\u8f93\u5165 sw[3:0]<\/code><\/span>\uff0c\u8fde\u63a5\u5230\u5f00\u5173\u6a21\u5757\uff1bIO14 ~ IO20 \u4f5c\u4e3a\u8f93\u51fa seg[6:0]<\/code><\/span>\uff0c\u5206\u522b\u8fde\u63a5\u4e03\u6bb5\u6570\u7801\u7ba1\u7684a ~ f<\/code><\/span>\u3002\u5c06\u5177\u4f53\u7684\u7ea6\u675f\u5199\u5165\u5230 decoder.xdc \u4e2d\uff1a"},"attrs":[]},"214":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"216":{"name":"code","html":"# sw input\nset_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS33} [get_ports sw[3]];\nset_property -dict {PACKAGE_PIN N20 IOSTANDARD LVCMOS33} [get_ports sw[2]];\nset_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS33} [get_ports sw[1]];\nset_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS33} [get_ports sw[0]];\n\n# seg output\nset_property -dict {PACKAGE_PIN Y21 IOSTANDARD LVCMOS33} [get_ports seg[6]];\nset_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS33} [get_ports seg[5]];\nset_property -dict {PACKAGE_PIN AA18 IOSTANDARD LVCMOS33} [get_ports seg[4]];\nset_property -dict {PACKAGE_PIN AB18 IOSTANDARD LVCMOS33} [get_ports seg[3]];\nset_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS33} [get_ports seg[2]];\nset_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS33} [get_ports seg[1]];\nset_property -dict {PACKAGE_PIN AA21 IOSTANDARD LVCMOS33} [get_ports seg[0]];\n\nset_property CFGBVS VCCO [current_design]\nset_property CONFIG_VOLTAGE 3.3 [current_design]","attrs":[]},"218":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5176\u4e2d set_property PACKAGE_PIN<\/code><\/span> \u547d\u4ee4\u8868\u793a\u8bbe\u7f6e\u7ba1\u811a\u7ea6\u675f\uff0c\u8fd9\u7c7b\u7ea6\u675f\u662f\u4e0e\u7535\u8def\u677f\u8fde\u7ebf\u76f8\u5173\u7684\u3002\u53ef\u7f16\u7a0b\u6a21\u5757\u4e0a\u6709\u5404\u79cd\u7535\u8def\u8fde\u63a5\u5230 FPGA \u4e0d\u540c\u7684\u7ba1\u811a\u4e0a\uff0c\u8fdb\u884c\u5b9e\u9a8c\u7684\u65f6\u5019\u9700\u8981\u9009\u62e9\u4e0d\u540c\u7684\u4fe1\u53f7\u4e0e FPGA \u54ea\u4e9b\u7ba1\u811a\u8fdb\u884c\u7ed1\u5b9a\u3002"},"attrs":[]},"220":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5b8c\u6574\u7684\u7ba1\u811a\u7ed1\u5b9a\u5173\u7cfb\u53ef\u4ee5\u53c2\u8003\u53ef\u7f16\u7a0b\u6a21\u5757\u90e8\u5206\u3002"},"attrs":[]},"222":{"name":"paragraph","html":{"component":"p","class":"","content":"\u6700\u540e\u4e24\u6761\u547d\u4ee4 set_property CFGBVS<\/code><\/span> \u548c set_property CONFIG_VOLTAGE<\/code><\/span> \u8bbe\u7f6e\u4e86 FPGA \u914d\u7f6e\u7535\u8def\u7684\u4f9b\u7535\u65b9\u5f0f\uff0c\u5b83\u4eec\u7531\u7535\u8def\u677f\u786c\u4ef6\u8bbe\u8ba1\u5f97\u51fa\uff0c\u5728\u5404\u4e2a\u5b9e\u9a8c\u4e2d\u4e0d\u9700\u8981\u66f4\u6539\u3002"},"attrs":[]},"224":{"name":"heading","html":{"level":"h3","class":"wp-block-heading","id":"","title":"\u8fd0\u884c\u5b9e\u73b0\u5e76\u751f\u6210\u6bd4\u7279\u6d41 bit \u6587\u4ef6"},"attrs":{"level":3}},"226":{"name":"paragraph","html":{"component":"p","class":"","content":"\u91cd\u65b0\u8fd0\u884c\u5b9e\u73b0\uff08Run Implementatuion<\/code><\/span>\uff09\u540e\uff0c\u9009\u62e9\u751f\u6210\u6bd4\u7279\u6d41\uff08bitstream\uff09\u6587\u4ef6\uff1a"},"attrs":[]},"228":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c28\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/28.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c28\u5f20"},"attrs":{"id":10168,"sizeSlug":"full","linkDestination":"none"}},"230":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"232":{"name":"paragraph","html":{"component":"p","class":"","content":"\u6210\u529f\u751f\u6210 bit \u6587\u4ef6\uff0c\u4e3a\u6700\u7ec8\u53ef\u4ee5\u88c5\u8f7d\u5230 FPGA \u4e2d\u7684\u6587\u4ef6\uff1a"},"attrs":[]},"234":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c29\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/29.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c29\u5f20"},"attrs":{"id":10169,"sizeSlug":"full","linkDestination":"none"}},"236":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"238":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5728 Vivado \u7684\u53f3\u4e0a\u89d2\u53ef\u4ee5\u770b\u5230\u5f53\u524d Vivado \u540e\u53f0\u7efc\u5408\uff0c\u5b9e\u73b0\uff0c\u751f\u6210 bitstream \u7684\u8fdb\u5ea6\u60c5\u51b5\u3002"},"attrs":[]},"240":{"name":"heading","html":{"level":"h3","class":"wp-block-heading","id":"","title":"\u914d\u7f6e FPGA"},"attrs":{"level":3}},"242":{"name":"paragraph","html":{"component":"p","class":"","content":"\u6709\u4e86\u6bd4\u7279\u6d41\u6587\u4ef6\u4e4b\u540e\u5c31\u53ef\u4ee5\u5c06\u6587\u4ef6\u88c5\u8f7d\u5230 FPGA \u4e2d\uff0c\u4f7f\u5176\u5de5\u4f5c\uff0c\u8fd9\u4e00\u8fc7\u7a0b\u4e5f\u53eb\u505a\u914d\u7f6e\u3002 \u6210\u529f\u751f\u6210 bit \u6587\u4ef6\u540e\uff0c\u9009\u62e9 Open Hardware Manager<\/code><\/span>\uff0c\u8fdb\u5165\u786c\u4ef6\u7ba1\u7406\u754c\u9762\uff1a"},"attrs":[]},"244":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c30\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/30.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c30\u5f20"},"attrs":{"id":10170,"sizeSlug":"full","linkDestination":"none"}},"246":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"248":{"name":"paragraph","html":{"component":"p","class":"","content":"\u6b64\u65f6 Hardware<\/code><\/span> \u6846\u4e2d\u6ca1\u6709\u4efb\u4f55\u82af\u7247\u4fe1\u606f\uff0c\u4e0b\u9762\u5f00\u59cb\u8fde\u63a5\u7535\u8def\u3002"},"attrs":[]},"250":{"name":"paragraph","html":{"component":"p","class":"","content":"\u9996\u5148\u628a\u5f00\u5173\u6a21\u5757\uff0c\u53ef\u7f16\u7a0b\u6a21\u5757\u548c\u5e26\u8bd1\u7801\u7684\u4e03\u6bb5\u6570\u7801\u7ba1\u6a21\u5757\uff0c\u8fdb\u884c\u7535\u8def\u8fde\u63a5\uff1a"},"attrs":[]},"252":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c31\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/31.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c31\u5f20"},"attrs":{"id":10171,"sizeSlug":"full","linkDestination":"none"}},"254":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"256":{"name":"paragraph","html":{"component":"p","class":"","content":"\u7136\u540e\u628a\u4e0b\u8f7d\u5668\u8fde\u63a5\u5230\u53ef\u7f16\u7a0b\u6a21\u5757\u4e0a\uff0c\u4e0b\u8f7d\u5668\u901a\u8fc7 USB \u8fde\u63a5\u5230\u7535\u8111\u4e0a\uff1a"},"attrs":[]},"258":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c32\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/32.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c32\u5f20"},"attrs":{"id":10172,"sizeSlug":"full","linkDestination":"none"}},"260":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"262":{"name":"paragraph","html":{"component":"p","class":"","content":"\u63a5\u901a\u5b9e\u9a8c\u6a21\u5757\u7535\u6e90\uff1a"},"attrs":[]},"264":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c33\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/33.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c33\u5f20"},"attrs":{"id":10173,"sizeSlug":"full","linkDestination":"none"}},"266":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"268":{"name":"paragraph","html":{"component":"p","class":"","content":"\u6b64\u65f6 Hardware<\/code><\/span> \u6846\u4e2d\u53ef\u4ee5\u770b\u5230\u82af\u7247\u4fe1\u606f\uff0c\u5982\u679c\u6ca1\u6709\uff0c\u8bf7\u70b9\u51fb Open Target<\/code><\/span>\uff0c\u7136\u540e\u9009\u62e9 Auto Connect<\/code><\/span>"},"attrs":[]},"270":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c34\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/34.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c34\u5f20"},"attrs":{"id":10174,"sizeSlug":"full","linkDestination":"none"}},"272":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"274":{"name":"paragraph","html":{"component":"p","class":"","content":"Hardware<\/code><\/span> \u6846\u4e2d\u5c31\u53ef\u4ee5\u770b\u5230\u82af\u7247\u7684\u4fe1\u606f xc7a35t_0<\/code><\/span>\uff0c\u6b64\u65f6\u82af\u7247\u7684\u72b6\u6001\u4e3a Not programmed<\/code><\/span>\uff1a"},"attrs":[]},"276":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c35\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/35.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c35\u5f20"},"attrs":{"id":10175,"sizeSlug":"full","linkDestination":"none"}},"278":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"280":{"name":"paragraph","html":{"component":"p","class":"","content":"\u5728\u82af\u7247\u4fe1\u606f\u5904\u53f3\u952e\u5355\u51fb\uff1a"},"attrs":[]},"282":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c36\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/36.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c36\u5f20"},"attrs":{"id":10176,"sizeSlug":"full","linkDestination":"none"}},"284":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"286":{"name":"paragraph","html":{"component":"p","class":"","content":"\u9009\u62e9 Program Device...<\/code><\/span> \u9009\u62e9\u88c5\u8f7d\u7684\u6587\u4ef6\uff0c\u4e00\u822c\u9ed8\u8ba4\u5c31\u662f\u672c\u9879\u76ee\u751f\u6210\u7684\u4f4d\u6d41\u6587\u4ef6\uff0c\u4e0d\u7528\u4fee\u6539\uff1a"},"attrs":[]},"288":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c37\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/37.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c37\u5f20"},"attrs":{"id":10177,"sizeSlug":"full","linkDestination":"none"}},"290":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"292":{"name":"paragraph","html":{"component":"p","class":"","content":"\u9009\u62e9 Program<\/code><\/span> \uff0c\u5bf9\u82af\u7247\u8fdb\u884c\u914d\u7f6e"},"attrs":[]},"294":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c38\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/38.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c38\u5f20"},"attrs":{"id":10178,"sizeSlug":"full","linkDestination":"none"}},"296":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"298":{"name":"paragraph","html":{"component":"p","class":"","content":"\u914d\u7f6e\u5b8c\u6210\u540e\uff0c\u53ef\u4ee5\u770b\u5230\u5f53\u8f93\u5165\u5f00\u5173\u4e3a 0000<\/code><\/span> \u65f6\uff0c\u4e03\u6bb5\u6570\u7801\u7ba1\u663e\u793a 0<\/code><\/span>\uff0c\u8bd1\u7801\u5668\u5de5\u4f5c\u6b63\u5e38\u3002"},"attrs":[]},"300":{"name":"image","html":{"title":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c39\u5f20 - FPGA\u7ebf\u4e0a\u8bfe\u7a0b\u5e73\u53f0\uff5c\u6700\u5168\u6808\u7684FPGA\u5b66\u4e60\u5e73\u53f0\uff5cFPGA\u5de5\u7a0b\u5e08\u8ba4\u8bc1\u57f9\u8bad","src":"https:\/\/admin.shaonianxue.cn\/wp-content\/uploads\/2025\/11\/39.png","alt":"\u56de\u7b54\u7ed9\uff1aVivado\u7684\u4f7f\u7528\u6d41\u7a0b\uff0c\u6709\u6ca1\u6709\u63a8\u8350\uff1f – 2025-11-04 22:16:24 - \u7b2c39\u5f20"},"attrs":{"id":10179,"sizeSlug":"full","linkDestination":"none"}},"302":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"304":{"name":"paragraph","html":{"component":"p","class":"","content":""},"attrs":[]},"306":{"name":"paragraph","html":{"component":"p","class":"","content":"\u6ce8\u610f<\/strong>\uff1a\u6bcf\u4e00\u4e2a\u5f00\u53d1\u677f\u90fd\u4f1a\u628a\u7279\u5b9a\u7684 FPGA \u7ba1\u811a\u4e0e\u7279\u5b9a\u7684\u7247\u5916\u5143\u5668\u4ef6\u76f8\u8fde\u63a5\u5728\u4e00\u8d77\uff0c\u56e0\u6b64\u7ea6\u675f\u6587\u4ef6\u53cd\u6620\u7684\u662f\u5f00\u53d1\u677f\u7684\u786c\u4ef6\u5b9e\u73b0\u60c5\u51b5\u3002\u53ef\u7f16\u7a0b\u6a21\u5757\u7684\u8fde\u63a5\u8bf7\u53c2\u8003\u53ef\u7f16\u7a0b\u6a21\u5757\u90e8\u5206\u5185\u5bb9\u3002"},"attrs":[]}}